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Pandya, Dhaval
- Coverage Implementation for FPGAs used in Tester
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Programmable Device Circuits and Systems, Vol 8, No 7 (2016), Pagination: 198-201Abstract
This Tester Board will incorporate the functionality of Tester Instrument and will be used for testing digital baseband processors, consumer SOCs, and AC Devices. Basically tester tests the ICs by giving different inputs and verify it. It has FPGA. This Paper discusses Verification Techniques through coverage and assertion Implementation. The aim of doing is to cover and verify all the functionalities of tester FPGA Chip. (Here Tester is some client’s project name. I can’t disclose it here. It is generic name). Ultimately we are verifying Tester FPGA Chip by implementing Coverage and assertion by using new techniques.
Keywords
ASIC, SPI(Serial Peripheral Interface), DUT(Design Under Test), UVM(Universal Verification Methodology), Coverage, Assertions, Vunit,, System Verilog, FPGA, Miso(Master-in-Slave-out), Mosi(Master-out-slave-in).- A Study on Saving and Investment Pattern of Salaried Class People with Special Reference to Surat City
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Affiliations
1 Ph.D., Financial Anxiety and Financial Advice, School of Commerce and Management, Dr. Babasaheb Ambedkar University, Anhmedabad
2 He is Enthusiastically Guiding Five Research Scholar, Four as Philosophy in Doctorate, Masters of Philosophy, IN
1 Ph.D., Financial Anxiety and Financial Advice, School of Commerce and Management, Dr. Babasaheb Ambedkar University, Anhmedabad
2 He is Enthusiastically Guiding Five Research Scholar, Four as Philosophy in Doctorate, Masters of Philosophy, IN